[ OK ] mount /dev/portfolio ......................... done
[ OK ] start logic-ip-sec.daemon ................... active
[ OK ] load modules: web · iot · fpga · mobile ...... 4/4
[ OK ] link birdwatch.sensor + trail.gps ........... up
[ WARN ] coffee reserves at 12% — refill advised
[ WARN ] 2 cat process(es) on keyboard — nice'd to 19
booting user profile ...

> whoami --verbose

SEBASTIÁN
HIDALGO VARGAS_

computer engineering undergrad · logic IP security designer

// designs tamper-resistant silicon by day, chases crazy projects at dawn. works from RTL to runtime — FPGA, embedded IoT, mobile & web.

./projects → ./about ./blog

ERR ◆ LEARN ◆ MAKE ◆ GROW ◆ ERR ◆ LEARN ◆ MAKE ◆ GROW ◆ ERR ◆ LEARN ◆ MAKE ◆ GROW ◆ ERR ◆ LEARN ◆ MAKE ◆ GROW ◆ ERR ◆ LEARN ◆ MAKE ◆ GROW ◆ ERR ◆ LEARN ◆ MAKE ◆ GROW ◆

HARDWARE THAT KEEPS ITS SECRETS. SOFTWARE THAT YOU CAN TRUST.

I care about the seam where silicon meets software. Everything here is built to be robust, scalable, and reach success.

VIEW PROJECTS → READ THE BLOG

DIE_2007 · 64×64 · REV.C

SEBASTIÁNHIDALGO VARGAS_

HARDWARE THAT KEEPS ITS SECRETS. SOFTWARE THAT YOU CAN TRUST.

SEBASTIÁN
HIDALGO VARGAS_